1. Field of the Invention
The present invention relates to an output buffer circuit and, more particularly, to an arrangement for improving the withstand voltage of an output buffer circuit comprising TFTs.
2. Description of the Related Art
Output buffer circuit is used for example as a circuit for outputting a signal generated in a circuit to a circuit in the next stage.
FIG. 3 is a circuit configuration diagram showing an output buffer circuit used in a liquid crystal display of an active matrix type. This circuit is such that address pulses generated in a vertical shift register are output to gate lines 22 through output buffer circuits 21. As shown in FIG. 3, the output buffer circuit 21 is formed of a CMOS transistor having a PMOS transistor mp1 and an NMOS transistor mn1.
Since the transistors forming the pixels are NMOS transistors in the described circuit, the amplitude of the input video signal in general is approximately between 0.5 V and (power source voltage VDD-threshold voltage Vth), i.e., the signal does not have the voltage amplitude between 0 V and the power source voltage VDD. However, the signal voltage output to the gate line 22 is required to have a dynamic range between 0 V and the power source voltage VDD. Therefore, a voltage of the same magnitude as that of the power source voltage PDD is applied between drain and gate, source and gate, and drain and source of the transistors mp1 and mn1 constituting the output buffer circuit 21.
Since the power source voltage PDD in general is as high as 14 to 18 V, if such high voltage is applied to the device directly, the reliability on the device will be impaired. As a measure to solve the problem, it is considered to make the gate oxide film thicker. When the gate oxide film is made thicker, however, such inconveniences are caused that the threshold voltage Vth is increased or the operating speed is lowered (gm is lowered), and in addition, such a problem is encountered that the entire process must be changed.